Batch 2010-2014, Works as Senior Design Verification Engineer, NVIDIA, Santa Clara, California, USA
Batch 2010-2014, Works as Software Engineer II at Microsoft, Washington USA
Batch 2010-2014, Works as Manager, CSC e governance services India Limited - Ministry of IT, Government of India
Batch 2009-2013, Works at Department of Space, Space Application Centre, ISRO
Batch 2012-16 Works as Risk Officer and IT Developer, TOBAM, Trinity College Dublin, Ireland
Batch 2013-17, Works as Senior Member, Technical Staff Mentor Graphics
Batch 2015-19 Works as Physical Design Engineer at NXP Semiconductors
Batch 2018-22 batch Placed with Fidelity International at a package of 8LPA
Batch 2017-2021, Pursuing MSc Robotics University of Bristol, Bristol, England
Batch 2017-2021 Pursuing PG in Wireless Telecom at Humber College, Canada
Batch 2018-22 batch Placed with TCS R&D at 10 LPA
Batch 2017-2021, Pursuing M. Tech from IIT Delhi by securing 99.8 percentile in GATE 2021 Placed with Intel Corporation
Batch 2018-22, Pursuing Higher Studies in Sensor System Technology from University of Applied sciences Karlsruhe, Germany
Batch 2016-20, Works as Lieutenant Indian Navy.