Electronics & Electrical Research – RIC
Designation: Deputy Director, MRIIC
Qualification: Ph.D (Pursuing), M.Tech (VLSI & Embedded System), B.Tech
Experience: 7 years
Area of Interest: VLSI Design and Embedded Systems
Email Id: firstname.lastname@example.org
Designation: Associate Professor
Qualification: PhD (RF & Microwave Engineering) University of Delhi
Experience: 15 Years
Area of Interest: Modeling high-frequency passive microwave components, Microwave & mm-Wave antennas, Meta-material absorber & cloaking, RF Power Transfer & Energy Harvesting.
Email ID: email@example.com
Designation: Associate Professor
Qualification: Ph.D (Microstrip Filters), M.Tech, MDBA (Marketing), B.E
Experience: 15 years
Area of Interest: Microwaves, Data Communication, Internet of Things
Email Id: firstname.lastname@example.org
Designation: Assistant Professor
Qualification: Ph.D (Pursuing), M.Tech , B.Tech
Experience: 14 years
Area of Interest: Power Electronics, Renewable Energy, Automation
Email Id: email@example.com
To be the world class research group in the field of Electronics & Electrical Engineering by creating knowledge that can be utilized to develop solutions that benefits the society and thereby contributing in the growth of the nation.
To develop research programs of global standards that address the industrial and social needs thereby creating a platform for the commercialization of research.
- Embedded System Design
- Low Power VLSI Design
- Digital Signal Processing (DSP)
- Power Electronics
3D PRINTING LAB ESTABLISHED IN ASSOCIATION WITH M/S TECHB BANGALORE
- TECHB M30 & TECHB Cu (2Pcs.)
Build volume in TECHB M30 is 300mm x 200mm x 200mm cube.(h*b*l)
Build volume in TECHB Cu is 200mm x 200mm x 200mm cube.(h*b*l)
Single Nozzle with on board computer
ABS, PLA, HIPS, Nylon, PVA, PET, Ninja flex.
Connectivity with PC and SD card.
Layer resolution upto 100 microns.
Filament diameter 1.75mm
Formats for files: Obj, Stl and G-codes only
COGENDA VLSI TCAD LAB
Manav Rachna Educational Institutions has signed an MoU with Cogenda to establish research facilities in the area of VLSI domain. Cogenda having their headquarters in Singapore provides software products and technical services in semiconductor simulation and other fields of numerical simulation. Founded in 2008, Cogenda is a private-owned company with strong emphasis on research. Having been serving customers from the semiconductor and aerospace industries with challenging and sometimes unconventional engineering objectives, Cogenda has emerged as a partner of in-depth physical insights and practical engineering solutions. Manav Rachna and Cogenda will jointly take on challenging problems related to novel devices like Tunnel FETs, Gate All Around Si Nano wire MOSFET, FINFETs with the aim of publishing research outputs in the International Journals of repute. Technical teams of Manav Rachna and Cogenda will also work together for designing a special curriculum on VLSI TCAD based on current industrial standards that will make students of Manav Rachna job ready in the field of Semiconductors. Cogenda will also train the faculty members of Manav Rachna under train the trainer program so that latest cutting edge knowledge related to semiconductor devices can be delivered to the students. Manav Rachna and Cogenda will also offer a short term training program for the students and faculty members that will target on the latest technologies related to VLSI field and after the successful completion of this course a certificate will also be provided to the participants by Cogenda. MRIIC team is excited about this collaboration and is ready to take on the challenging research problems with Cogenda.
SYMICA custom IC design toolkit for VLSI Circuit level simulations
Symica is an Electronic Design Automation (EDA) tool for the analog and mixed-signal integrated circuit design. Symica has all major capabilities of modern IC development suites. Symica has HSPICE® and Spectre® compatible for netlists, models and analysis features.
SYMICA EDA (AMS) Design Tool Kit with SPICE model support upto 16 nm CMOS technology FINFET technology, Verilog A model support for CNT, graphene and Tunnell FET (TFET)-
Texas Instruments Power Electronics Lab
Facilities Established by Texas Instruments under Texas Instruments India University Program and the MoU for running the lab has been signed with M/S Edgate Technologies Bangalore (Official partner of Texas Instruments India University Program).
Texas Instruments Embedded System Design Lab
Facilities for Embedded Projects and Research are Established by Texas Instruments under Texas Instruments India University Program. Texas Instruments donated Launchpads based on ARM processor to carry out research and develop social innovative projects using their updated technologies.
Texas Instruments Analog System Design Lab
Facilities for Analog Projects and Research are Established by Texas Instruments under Texas Instruments India University Program. Students design different circuits on simulator’s and analog hardware kits for research purpose using these facilities.
Intel IOT Centre
Facilities Established by Intel Under Intel Higher Education Program for developing various IOT based projects. Intel donated Galileo boards and Edision boards to develop projects using Linux framework. Multiple Workshops are conducted on regular basis for students in IOT and Embedded System Domain using these facilities.
Projects & Competitions
- Projects & Competitions
- Research Publications
- Product Development Initiatives
- Funded R&D Projects
- Training in Advanced Areas
1. To expand tie ups with government organizations, industries and academia for carrying out collaborative research.
2. To provide training to the university graduates in advanced areas to meet the ever growing and changing industrial and business environment.
3. To promote research based learning in academia in partnership with leading industries and universities of national and international repute.
4. To build centre of excellence that leverage existing resources of the institution for promoting interdisciplinary research.
5. To provide support for filing of IPRs of the novel research work carried out by the research cluster and encourage the commercialization of the intellectual property.
6. To foster innovations that can be represented at national and international level project competitions, exhibitions and conferences.
7. To impart necessary skills to the university graduates so that they can excel in project competitions.
8. To encourage publishing of the research outputs in the journnal of repute.